snippet pin "vivado"
set_property -dict {PACKAGE_PIN ${1:K26} IOSTANDARD ${2:LVCMOS33} DRIVE 16 SLEW FAST} [get_ports ${3:gmii_txd[1]}] 
endsnippet

snippet xdc_min "compress and ignore NSTD"
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property SEVERITY {Warning} [get_drc_checks NSTD-1]
set_property SEVERITY {Warning} [get_drc_checks UCIO-1]
endsnippet

snippet ila_mark_debug "MARK_DEBUG" b
set_property MARK_DEBUG true [get_nets {DAC_A_DB_OBUF[2]}]
endsnippet

snippet ila_create_debug_core "Create a new Integrated Logic Analyzer debug core" !b
create_debug_core ${1:u_ila_0} ila
# ILA配置
set_property ALL_PROBE_SAME_MU true  [ get_debug_cores $1]
set_property ALL_PROBE_SAME_MU_CNT 1 [ get_debug_cores $1]
set_property C_ADV_TRIGGER false     [ get_debug_cores $1]
set_property C_DATA_DEPTH 32768      [ get_debug_cores $1]
set_property C_EN_STRG_QUAL false    [ get_debug_cores $1]
set_property C_INPUT_PIPE_STAGES 0   [ get_debug_cores $1]
set_property C_TRIGIN_EN false       [ get_debug_cores $1]
set_property C_TRIGOUT_EN false      [ get_debug_cores $1]

# ILA时钟端口
set_property port_width 1 [get_debug_ports $1/clk]
connect_debug_port $1/clk [get_nets [list pl_topEx01/system_clkEx01/inst/clk_out1]]

# ILA默认至少有一个probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports $1/probe0]
set_property port_width 2 [get_debug_ports $1/probe0]
connect_debug_port $1/probe0 [get_nets [list {DAC_A_ADDR_OBUF[0]} {DAC_A_ADDR_OBUF[1]}]]

# add new port

# ILA配置
set_property C_CLK_INPUT_FREQ_HZ 300000000 [ get_debug_cores dbg_hub]
set_property C_ENABLE_CLK_DIVIDER false    [ get_debug_cores dbg_hub]
set_property C_USER_SCAN_CHAIN 1           [ get_debug_cores dbg_hub]
connect_debug_port dbg_hub/clk             [ get_nets $1_clk_out1]
endsnippet

snippet ila_create_debug_port "Create a new debug port" !b
create_debug_port u_ila_${1:0} probe
set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_$1/probe${2:1}]
set_property port_width [llength [get_nets ${3:*}]] [get_debug_ports u_ila_$1/probe$2]
connect_debug_port u_ila_$1/probe$2 [get_nets $3]
endsnippet
